Regviz

Raspberry Pi /RP2350 /WATCHDOG /CTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CTRL

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Raspberry Pi/RP2350/WATCHDOG/CTRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TIME0 (PAUSE_JTAG)PAUSE_JTAG 0 (PAUSE_DBG0)PAUSE_DBG0 0 (PAUSE_DBG1)PAUSE_DBG1 0 (ENABLE)ENABLE 0 (TRIGGER)TRIGGER

Description

Watchdog control The rst_wdsel register determines which subsystems are reset when the watchdog is triggered. The watchdog can be triggered in software.

Fields

TIME

Indicates the time in usec before a watchdog reset will be triggered
PAUSE_JTAG

Pause the watchdog timer when JTAG is accessing the bus fabric
PAUSE_DBG0

Pause the watchdog timer when processor 0 is in debug mode
PAUSE_DBG1

Pause the watchdog timer when processor 1 is in debug mode
ENABLE

When not enabled the watchdog timer is paused
TRIGGER

Trigger a watchdog reset

Links

()

Register License

Copyright © 2024 Raspberry Pi Ltd.

SPDX-License-Identifier: BSD-3-Clause

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data